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Overview:
DDR is a high performance memory controller to interface with DDR-SDRAM memory devices. It is having three bus interfaces, Memory interface, Configuration bus interface and Host interface. The configuration bus facilitates to program the internal configuration registers. And the Host bus interface is used to initiate the memory data transactions. Host Applications place the Read/Write requests on this bus and the DDR core correspondingly performs the data transactions.
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| Format: | Size: | 35 KB | |
| Date: | Dec 2003 | ||
| Pages: | 2 |
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