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Overview:
The author reports on their experience with the Hardware Transactional Memory (HTM) feature of two pre-production revisions of a new commercial multicore processor. The author's experience includes a number of promising results using HTM to improve performance in a variety of contexts, and also identifies some ways in which the feature could be improved to make it even better. The paper gives detailed accounts of the experiences, sharing techniques one used to achieve the results one has, as well as describing challenges they faced in doing so.
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| Format: | Size: | 158 KB | |
| Date: | Mar 2009 | ||
| Pages: | 12 |
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